Sempron is AMD's newest low-end CPU. It is replacing the Duron processor, and will compete against Intel's Celeron D processor.
Initial variants were based on the Athlon XP's Thoroughbred/Thorton Core, with a 256 KiB L2-Cache and 166 MHz Front side bus (FSB 333). The recently introduced Sempron 3000+ is based on Barton core and has 512 KiB of L2-Cache. Later versions will use a version of the Athlon 64 called Paris, which will not support AMD64 instructions and will also only have 128 or 256 KiB of L2-Cache. One model that already uses the "Paris" core is the Sempron 3100+. The Sempron shares a few of the common features in the Athlon 64, including the integrated on-die memory controller as well as support for the Socket 754 infrastructure. It does not, however, include 64-bit support.
Models
Thoroughbred B/Thorton (130 nm)
- L1-Cache: 64 + 64 KB (Data + Instructions)
- L2-Cache: 256 KB, fullspeed
- MMX, 3DNow!, SSE
- Socket A (EV6)
- Front side bus: 166 MHz (FSB 333)
- VCore: 1,60V
- First release: July 28, 2004
- Clockrate: 1500 MHz - 2000 MHz (2200+ to 2800+)
Barton (130 nm)
- L1-Cache: 64 + 64 KB (Data + Instructions)
- L2-Cache: 512 KB, fullspeed
- MMX, 3DNow!, SSE
- Socket A (EV6)
- Front side bus: 166 MHz (FSB 333)
- VCore: 1,6 V
- First release: September 17, 2004
- Clockrate: 2000 MHz (3000+)
Paris (130 nm SOI)
Palermo (90 nm SOI)
- Early models are downlabeled "Oakville" mobile Athlon64
- L1-Cache: 64 + 64 KB (Data + Instructions)
- L2-Cache: 128/256 KB, fullspeed
- MMX, 3DNow!, SSE, SSE2
- Cool'n'Quiet (ab 3000+ and higher)
- Enhanced Virus Protection (NX-Bit )
- Integrated memory controller
- Socket 754, 800 MHz HyperTransport
- VCore:
- First release: February 2005
- Clockrate: 1600 - 2.000 MHz
- 128 KB L2-Cache: 1600 - 2000 MHz (2600+ to 3200+)
- 256 KB L2-Cache: 1600 - 2000 MHz (2800+ to 3300+)
See also
